1. Field of the Invention
The present invention relates to a cascode circuit, and more particularly, to a cascode circuit configured to operate at a low working voltage and to have a wide amplitude output signal.
2. Description of Related Art
Conventional cascode circuits, commonly referred to as "regulated cascode" circuits are known. One example of this cascode circuit is disclosed in Japanese Patent Application Laid-open Publication No. JP-A-59-012503.
Referring to FIG. 1, there is shown a circuit diagram illustrating a cascode circuit disclosed in Laid-open Publication No. JP-A-59-012603. The cascode circuit of FIG. 1 comprises a pair of NMOS (N-channel MOS) transistors 1 and 2 connected in series between an output terminal 71 and a low voltage supply potential (ground), and an NMOS transistor 36 and a PMOS (P-channel MOS) transistor 37 connected in series between a high voltage supply potential V.sub.DD and the low voltage supply potential (ground). A gate electrode of the transistor 1 is connected to an input terminal 70, and a gate electrode of the transistor 36 is connected to a connecting node "A" between the transistors 1 and 2. A gate electrode of the transistor 2 is connected to a connecting node "D" between the transistors 35 and 37. A voltage source VG is connected between a gate electrode and a drain electrode of the transistor 37.
This cascode circuit has a powerful negative feedback loop, which is constituted of an amplification circuit composed by the transistors 2 and 36, so that a source potential of the transistor 2 is fixed by a gate-source voltage of the transistor 36, that is to say, by a gate potential of the transistor 36.
Thus, a drain current, which is determined in accordance with an input voltage supplied to the gate electrode of the transistor 1, is almost free from the effect of a direct current potential of the output terminal 71. Therefore, the output current becomes constant, and it has an extremely high output impedance. As a result, it is possible to obtain a large amplification factor when this circuit is used in an amplification stage of an operational amplifier.
As mentioned above, in the conventional cascode circuit, a lower limit value of a working voltage at the output terminal is substantially determined by a gate-source voltage of the transistor 36, the value being about 1 V in a usual CMOS (complimentary metal oxide semiconductor) process. In addition, the lower limit value of the working voltage V.sub.DD is a saturated voltage of the transistor 37 added with respective gate-source voltages of the transistor 2 and 36. Namely, it is about 2.5 volts.
Therefore, there is a disadvantage that, when operated at a low working voltage (for example, 3 volts), a dynamic range of an output signal at the output terminal becomes narrow, which causes a shortage of margin of a bias point in comparison with a voltage supply voltage.